By Bart Vermeulen,Kees Goossens
This e-book describes an technique and helping infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), permitting its linked product to be brought into the marketplace extra quickly. Readers examine step by step the most important standards for debugging a latest, silicon SOC implementation, 9 elements that complicate this debugging job, and a brand new debug method that addresses those requisites and complicating factors. The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug process is mentioned intimately, displaying the way it is helping to fulfill debug specifications and handle the 9, formerly pointed out elements that complicate debugging silicon implementations of SOCs. The authors additionally derive the debug infrastructure necessities to aid debugging of a silicon implementation of an SOC with their CSAR debug method. This debug infrastructure contains a widespread on-chip debug structure, a configurable automatic design-for-debug movement for use in the course of the layout of an SOC, and customizable off-chip debugger software program. assurance comprises an overview of the potency and effectiveness of the CSAR strategy and its helping infrastructure, utilizing six commercial SOCs and an illustrative, instance SOC model. The authors additionally quantify the expense and layout attempt to aid their approach.
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Debugging Systems-on-Chip: Communication-centric and Abstraction-based Techniques (Embedded Systems) by Bart Vermeulen,Kees Goossens