By Endong Wang,Qing Zhang,Bo Shen,Guangyong Zhang,Xiaowei Lu,Qing Wu,Yajuan Wang
The objective of this booklet is to give an explanation for to high-performance computing (HPC) builders the way to make the most of the Intel® Xeon Phi™ sequence items successfully. accordingly, it introduces a few computing grammar, programming expertise and optimization equipment for utilizing many-integrated-core (MIC) systems and in addition bargains counsel and methods for real use, in response to the authors’ first-hand optimization experience.
The fabric is geared up in 3 sections. the 1st part, “Basics of MIC”, introduces the basics of MIC structure and programming, together with the categorical Intel MIC programming setting. subsequent, the part on “Performance Optimization” explains common MIC optimization ideas, that are then illustrated step by step utilizing the classical parallel programming instance of matrix multiplication. ultimately, “Project improvement” offers a suite of sensible and experience-driven equipment for utilizing parallel computing in program tasks, together with the right way to confirm if a serial or parallel CPU software is appropriate for MIC and the way to transplant a software onto MIC.
This publication appeals to 2 major audiences: First, software program builders for HPC purposes – it is going to let them to completely take advantage of the MIC structure and hence in attaining the intense functionality often required in organic genetics, scientific imaging, aerospace, meteorology and different components of HPC. moment, scholars and researchers engaged in parallel and high-performance computing – it's going to advisor them on find out how to push the boundaries of process functionality for HPC purposes.
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High-Performance Computing on the Intel® Xeon Phi™: How to Fully Exploit MIC Architectures by Endong Wang,Qing Zhang,Bo Shen,Guangyong Zhang,Xiaowei Lu,Qing Wu,Yajuan Wang